Estimating Pickment Machine Costs refer to BOM Analysis

Estimating Placement Machine Costs refer to BOM Analysis

Since the cost of placement machines accounts for 70% of the production line, it is important to analyze the value of the machine， It can be tempting to try to cut corners in this part of the SMT assembly process, but attempts to save funds in the short-term could cost you in the long run. Some of the productivity headaches we’ve had customers tell us about when they’d tried to “go cheaper” in the past include:

Time lost to excessive changeovers or attempts to optimize setups
Failure to keep pace with output goals
A need to add costly hand assembly for parts the machine didn’t handle
Too much offline time due to service and support issues
It is, however, just as easy to overspend—on capacity, speed, or features you don’t need. The more you invest in a machine, the longer it takes for it to earn its keep. So why waste money on capability you’ll likely never use?

The sweet spot is to achieve payback within a year or so—without incurring additional unexpected costs. At Joysmt, we’ve been able to work with customers to get them a return on their investment in as little as nine months.

It all comes down to maximizing productivity while minimizing investment dollars—something that’s a lot easier to do if you do it all the time, like our team does. Of course, you can try to do it on your own or you can hire a consultant to help you, but did you know that Joysmt offers—free, with no obligation—a full-scale professional analysis of your production requirements and bills of materials (B.O.M.)? For no charge, Joysmt will custom-configure a machine to meet your exact specifications and throughput requirements. What’s more, based on your total budget, we will make recommendations for feeder types, sizes, and quantities to provide optimum performance, minimum changeover, and the quickest return on your investment.


Full-Scale Production Analysis
What does a free Joysmt Production Analysis entail? It starts with one of our experienced team members asking you basic questions about your needs. For example:

What’s the largest PCB you assemble?
What is the smallest component you need to place? How many?
The finest pitch QFP? BGA?
What is the largest component you need to place? How many?
How many different board designs do you have to build?
Are the boards single- or double-sided?
What is the maximum number of unique components on any one side of all of the boards you build?
Is there a lot of component commonality among the various board designs?
How many total component placements are there per board?
For each design, how many boards do you need to assemble per year?
What is the typical size (number of boards) of a production run?
Will your pick and place be used as an in-line machine or in a stand-alone batch configuration?
We’ll also ask you to send along the full B.O.M. for each of your products. (And we're happy to sign an NDA agreement before you send it.) You needn’t worry if your B.O.M. is in a raw format. Our team can usually identify component sizes and packaging from your most basic descriptions by means of our extensive SMD cross-reference.

Feeder capacity, combined with a feeder strategy geared toward optimizing and streamlining setup and job changes, can make the difference between a chronic headache and a smooth-running operation for manufacturers who intended to run several different jobs on a single machine.

All of this information together will help us pass along to you the following information:

The pick and place machine model(s) that will best meet your placement accuracy, range of component sizes, feeder capacity (for either batch or inline configurations), and throughput requirements (CPH)
The minimum number, types, and sizes of feeders you’ll need to build any one of your boards
The number, types, and sizes of feeders you’ll need, optimized for common components across jobs to ensure minimal changeover
Optional cameras or other accessories needed to handle ultra-small, over-sized, or odd-form components
Other accessories and recommendations that can minimize cost and maximize machine utility
Making use of decades of experience evaluating B.O.M.s and custom configuring countless pick and place machines, our equipment experts will carefully review this information with you, along with strategies for simplifying changeovers, streamlining workflow, and reducing your overall pick and place machine cost.

Joysmt provides similar free needs-analysis services for all our major production equipment, including reflow ovens, stencil printers, complete assembly lines, and wave solder machines. Whatever your equipment needs, get in touch with a Joysmt electronics assembly equipment expert today.

Advanced modelling technique achieves near to zero set up time and minimal tuning

Advanced modelling technique achieves near to zero set up time and minimal tuning

Automatic Optical Inspection (AOI) is now an established solution for the reliable inspection of printed circuit boards (PCB’s) in the electronic manufacturing industry. AOI systems have developed considerably since their introduction in the mid 90’s, and now appear on most surface mount technology (SMT) production lines World-Wide. The majority of AOI systems utilize standard vision analysis technology in the form of multiple controlling algorithms and although there are many variations of this approach most are “programmed” and “tuned” in the same way. Modelling technology however is completely different in that it does not use a standard algorithmic approach but calculates process variation in real time on real production data by analysing pixel by pixel the image of the real production PCB. First conceived in the mid 1990’s and extensively developed since

Modelling [1] is based on Principle Component Analysis (PCA) and has many advantages for companies looking for a fast and versatile system that can be deployed to production very quickly and with the minimum of on-going production tuning.





Importance of fast set up & minimal tuning time

One of the key metrics when selecting AOI solutions is the total cost of ownership of the system once deployed to production. Programming time and production tuning time are major contributors to the on-going ownership costs hence should be measured and understood well in advance of production integration. In low volume / high mix applications set up time is even more important as the AOI program has to be ready and capable of reliable inspection before the production run is complete to have any real value. With production batch sizes below 20 x PCB’s this is very difficult to achieve on most algorithm systems.

Limitations of Algorithm technology approach for fast set up

Most algorithm technology systems are set up with the user having to anticipate the possible range of defects that could occur in production. The set up process includes selecting combinations of algorithms and setting their parameters in addition to those controlling image acquisition. This can be very time consuming with careful attention required to ensure everything is set up accurately.

Advantages of modelling technology for controlling process variation

Statistical Appearance Modelling technology is set up very easily and simply from an image of the first production PCB. The system “learns real world variation” based on operator interaction with the reported results of the inspection tasks. This results in a very accurate statistical description of the normal variation in the product. Using this description during inspection allows accurate reporting of what is acceptable and what is not acceptable to the user based on individual process or quality requirements. Clear advantages of this approach are that the user does not have to anticipate potential defects or process issues as the system will “flag” anything that is outside of the “normal production range” and secondly because the system is programmed with real production variation it is very sensitive to small subtle changes enabling very reliable defect detection. Recent developments to this technology include autonomous prediction of process variation which enables the AOI system to be set up from a single PCB with production ready performance. Set up time can


be as low as 15 minutes from data input to first PCB inspection making it extremely attractive for new product introduction (NPI) and first off verification.


Performance comparison of modelling technology versus Algorithm technology

The tables below are results taken from a recent production evaluation in the Automotive Industry. The PCB tested is a 6 up panel 300mm in length and 260mm in width with a total component count of 1380 and 73 individual component types. The inspection set up included tasks to reliably detect all component body, position, text, value, and solder joint related defects and the total individual inspection task count was 8,307

Table 1 below clearly illustrates a significant performance advantage of the modelling approach versus algorithm technology on this application with results of up to 3 x faster set up time for the modelling system. Of course a fast set up is only advantageous if the system can reliably inspect PCB’s afterwards with a very low false failure rate and provide some immediate value to the user





Table 2 below again illustrates a significant advantage from the modelling system when counting false failures after programming from 1, 10, and 30 panels. Again the modelling system was around 3 x lower in false failure rates.


AOI systems have developed considerably over the past twenty years and with the constant advances in computational technology there is no doubt that this pace of development will continue. Modelling technology is a key area of image analysis that is benefiting from these advances and is already a very attractive alternative to traditional algorithm technology when applied in SMT inspection.

With the ever increasing demand for faster set ups and improved inspection performance on a wide range of applications, statistical modelling technology is a very interesting and valuable solution especially where set up times and cost of ownership are critical to success.

The PCB Used In Marine Industry Paving Way For Innovations

The PCB Used In Marine Industry Paving Way For Innovations

As the technology has become a universal key to major developments, the marine and boat industry has shown elevated growth in recent time. The marine market circumscribes on the electronic and design solutions for every single innovation. All the developments in Marine sector has and are heading towards a notion of modernization and among these, printed circuit board is grounding the research and developments. How to increase the efficiency of the device? How to gain optimum fuel efficiency? Does the dual fuel concept become a buzz word for major innovations? These are the basic questions which are considered to bring new novelties in the market. This article is a detailed conspectus of marine and boat industry and the role of printed circuit boards in manufacturing modified marine electronic instrumentation. This will also drive you to the spotlights into the use of PCB prototypes, PCB assembly and PCB Design in Maritime industry, the commendable marine innovations/ New concepts and the prime factors affecting the modernization in the marine industry.

Awash with modernization, the marine market shows innovations in safety devices, telematics, equipments with resistance to vibration, underwater marine machinery and many more. The marine and boating industry shows a major concern for the protection of electrical resources from destruction due to climatic reactions and global warming. With this, the Submarines, weather sensors, marine gauges, underwater equipment, crane, flood detector, galvanic Isolator, fuel efficient motors and other tough marine applications need proven design to engineer the marine vessel manufacturing.

The electric connectivity and mechanical support provided by marine PCB’s is at the base to create an all to gather efficient Marine machinery and aquatic vessel. From manufacturing ship, yachts, craft and other aquatic vessels depend on printed circuit boards to control the marine mechanism with electronic process. Among all, Rigid/Flex PCB is majorly used in providing electronic solutions that have an efficient RF Module. The maritime electronic PCB are of many types depending upon the purpose of use. The double layered and multi layered PCB is used for complex compositions of marine vessels. Also high grade PCB material is used in the circuit board that well suits the climatic reactions in the sea. The PCB is at the base of every single marine innovation happening across the globe. To explore more insights into the PCB used in the Marine industry, it is equally important to know about the current Maritime industry.

Initially the marine market marked stagnation before few decades. Gradually, with a drift in technology, the boat and marine industry has picked up a pace with new developments. This can be marked in marine civil construction and engineering, underwater ad diving technology, marine equipment, marine electronics, renewable energy and marine security. The research for developments in maritime sector has added crowns in the small devices and large equipment as well. Few developments seen in small marine devices are outlined as under:

Marine load testing is an electronic portable equipment with strong hydraulic cylinder and customized ropes to create more than 120 tonnes of pull underwater. The underwater Impact torque device is a marine electronic tool to strongly tighten the screw and nuts to perfect torque. The saltwater pressure washer that works with the help of Diesel and is extensively used for maintenance and cleaning of wind farms. The design and structure of the machine is such that has resistance to the marine conditions and can efficiently wash the offshore wind farm. The radio combiner and other marine telecommunication devices have an ergonomic design for compact high speed craft.

Apart from these, boat/ship dashboards, exit lights, marine spotlights, navigation system, electronic counter measurement device, engine management, radar system, beacon and strobe system have markedbreakthrough modifications to make it a fuel efficient and time savvy marine operations.

Recent Concepts:
0The Advance Outfitting is the time and cost saver technique to manufacture the ship and heavy marine machineries. In this method, the ship building process involves assembling the marine outfits like seating, piping, machinery in a small unit which is fixed at its actual position afterwards in the hull block. This saves much time and cost as before the ship building process the hull is fabricated first and after launching the hull from the berth, the outfitting process starts that proves to be tedious and time consuming.

0The Green Ship Technology to reduce the carbon is a step ahead to environmental protection. It has a solar cell integration with effective anti ballast system. For making marine operations greener, many other marine electronic devices are launched in the market that includes the optimized cooling system, engines to bring down the level of nitrogen oxide level, exhaust scrubber, solar cell hybrid system, dual fuel motors and many more.

Be it a new or an old concept driving the marine operations, few factors affect the modernization in Marine innovations. Among which the Environment is a top most factor of prime consideration. Another aspect that brings a Dinger in the maritime industry is making a move towards Digitalization of all the marine operations. At the end, researchers are now striving to trigger the innovations in electronic instruments and control system that has high applicability in the Marine industry. Among which the different types of PCB prototypes and PCB assembly services are grounding the studies to come up with better and better solutions for marine machine manufacturing.

Solder wire and paste feature | SMT Technology

Solder wire and paste feature | SMT Technology

Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper “sandwich” to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed.

Solder voids in solder joints are a common occurrence in SMT assemblies. Their origins are not well understood but are typically faulted as a failure of the solder fillet to thoroughly expel flux remnants during the reflow process. The amount of solder voiding can vary significantly within an assembly, between different flux formulations, solder alloys, board and component metalizations. Reflow profiles as well as stencil aperture designs can often affect the overall level of voiding.




Adding to the mystery of solder voiding is a lack of quantitative measurement tools in the industry with few exceptions. BGA void analysis software is one of these exceptions. This software uses gray level pixel analysis to determine the perimeter of the solder sphere and the internal perimeters of the voids. Once the perimeters are established the areas within these structures can be measured and an overall percent voiding can be calculated. This type of measurement works well if the voids are large or found on the outer edges of the sphere but if the void is small and centrally located where the sphere density is the greatest then the void may be invisible due to its relatively similar gray level to the surrounding material. Increasing the X-ray power will reveal the small void but also shrink the measured area of the sphere and yield an inaccurate and inflated percent voiding. This problem is even more complicated in a chip or a leaded component solder joint. When X-raying a completed assembly, internal traces, vias and even components on the backside of the board that intersect the image of the solder joint confound the software algorithms ability to accurately determine the perimeter of the solder joint. In simple terms the X-ray image is two-dimensional and the ideal structure must be symmetrical about the Z-axis such as a box or a cylinder.

Novel Approach

Based on the assumption that the ideal quantitative void measurement method will utilize BGA analysis software and a symmetrical Z-axis reflow structure, the “sandwich” concept was developed.




This a novel approach simulates the worst conditions of a solder joint for voiding, under the component where flux evacuation is the most difficult while maintaining the same reflow thermal environment and metallurgies if desired. This idea was born out of a quest for a quantitative method of determining the percent voiding on a Ceramic Column Grid Array (CCGA)1. In the CCGA the columns are 10/90 Sn/Pb and cover about 45% of the solder fillet. If enough power is used to see through these dense columns, the perimeter of the solder joint is washed out and 55% of the total fillet is invisible. If adequate power is used to see the perimeter of the circular fillet, the area under the columns is invisible. The effort is complicated by column parallax, internal traces and vias as can be seen in Figure 1. With the thought of a column the same diameter as the solder pad that is thin enough to be X-rayed without excessive power, a solder preform was selected. In this application the preform alloy was selected to be the same as the 10/90 columns to minimize the variables that could contribute to solder voiding. Several thicknesses were tested with a 30 mil diameter by 5 mil thick as the final solution.


There were numerous challenges placing these discs. The first problem was a reliable source cup shaped and stacked discs were the first problems to solve. The second problem was the mechanics of actually placing the discs in that the vision systems in the pick and place were never programmed to recognize round components, only components with corners like typical chips. This relegated a “ballistic” pick and place strategy. For this problem a precision matrix tray with cylindrical pockets, each holding one preform, was developed as in Figure 2. Next came improvements to the pick and place nozzle. The stock smallest nozzle OD was the same as the preform. This presented numerous pick problems if the preform was not perfectly centered, occasionally the preform would flip on its edge after pick and crash on placement deforming the preform. Several improvements were made ultimately reducing the nozzle tip down to what would be typical for a 0201 chip as in Figure 3. Reducing the nozzle tip surface area helped eject the preform better in the placement operation.

Assembly of the CCGA test coupons is simple SMT assembly beginning with a “pads only” ceramic coupon to maintain the geometries and pad metalization of the application. This coupon is free of internal traces as in Figure 4. The solder paste is printed through a circular aperture that is 1 mil smaller in diameter than the pad, the preform is placed over the solder paste and then reflowed as in Figure 5. It was established that if the preform was off pad less than 4 mils that it would self-center. Careful attention to Z-axis placement is required to prevent shorting with adjacent preforms.

After assembly the coupon area was X-rayed and quantitative void analysis was performed on the image using off- the-shelf BGA analysis software as in Figure 6. This software provides both total percent voiding and a pass/fail status if any individual void within a structure is larger than a preset number (ie 5%). This technique worked very well for the custom formulated 63/37 Sn/Pb based solder paste or any other alloy with a similar melt point but when tested with lead free (Sn/Ag/Cu, Mp 219°C) it was noticed that the preforms had appeared to melt and partially join the underlying solder paste under test. This was remedied by switching to OFHC copper preforms of identical geometries. For generic paste void benchmarking2 a dedicated pad test area (Figure 7) was included in the Benchmarker II test board. This allows the testing of solder pastes on standard PCB surfaces such as Entek OSP (Organic Solder Protectant) and ENIG (Electroless Nickel Immersion Gold). Quite simply we are making copper sandwiches (Figure 8) that result in cylindrical structures, which permit highly quantitative void analysis with standard BGA analysis software.

rom this data there are clearly different trends for the two materials as well as a significant difference in void behavior between them. The effect of time on Material A is accelerated in cold storage and just the opposite with Material B. Both materials have the exact same source and specifications of the inorganics (powder + additives).

Profile Effects
The effect of the reflow profile can be significant but the magnitude varies greatly from one formulation to another. The following example involves two 63/37 Sn/Pb no clean materials3,4, tested over Entek passivated copper using the copper preforms with the 4 profiles as illustrated in Figure 10. This profile matrix is designed to expose profile sensitivity of a given formulation, in this case relating to voiding. There are two profiles with a ramp style preheat and two with a soak preheat. There are 2 profiles with a peak of 225°C with 60 seconds over liquidous and two hotter profiles with a peak of 240°C with an extended liquidous of 90 seconds. The X-ray data has been compressed into a single “point scale” to facilitate comparisons. These points (100 is best) are calculated .

BGA REWORK|SMT Technology

BGA REWORK

Since the late 1990s ball grid array (BGA) packages have been gaining as a preferred package style for several reasons. Their IO density compared with the previous high density ultra fine pith quad flat packs (QFPs) is such that they have shrunk the necessary footprint on the PCB by a factor of 50%. If we lump the BGA style of package, a high density IO with solder balls for the interconnection in with its stacked version counterpart the POP then this increase in density approaches nearly 100%. The ability to get more done in less space along with shorter trace spacing and length requirements for board layouts using this package style have allowed boards to be clocked at much higher rates

thereby increasing processing speed. In addition the reliability of the placement of BGAs has been high as initially the tin lead solder balls “self centered” on the pads during reflow. Lastly the reliability

of BGA packages has been increased with the use of underfills, the use of specialty flex solder balls and even solder columns with integrated springs.

The increased use of BGAs and the underlying trend of ever-smaller package sizes, finer pitches and their placement on to ever denser printed circuit boards has led to greater and greater challenges in BGA rework. In addition to these challenges there are many others that have made the job of BGA rework technicians more and more difficult. One of the trends in making BGA rework more difficult is their ever-increasing usage in handheld device. Due to the drop test requirements of these products

in many cases the BGAs and other higher density devices need to be underfilled. Underfilled BGAs have the challenge of the tacky material “squirt out” causing solder shorts underneath the BGA. In

addition, the tacky nature of this material tends to lift pads as well as destroying the underlying solder mask underneath he BGA. This makes the BGA rework even more challenging. The ever-thinning device packages of BGAs cause the packages to warp. This too makes BGA rework difficult.

While large packages with large-sized pitches placed on sparsely populated printed circuit boards made BGAs simple to remove and replace, BGA rework today requires a greater level of machine sophistication. With pitches down in to the 0.3mm areas and package sizes routinely under 10 x

10mm placement with a vision system using a highly precise and repeatable XY motion system is required. Placement accuracies for today’s BGA rework need to be in the less than a 1mil tolerance

range. In addition with the lead free packages the rework system now require sophisticated temperature control with programmable multi zone bottom heaters, nitrogen capability and low flow rates at the air nozzle. In addition to the rework equipment set the inspection equipment needs to be of a higher capability. X-ray inspection equipment with very small spot sizes is a requirement for BGA inspection post BGA rework. The ability to measure the sphericity of the solder balls, the solder ball diameter, the ability to shoot through RF shields as well as higher density ground planes is now a necessity for the x-ray equipment requirements for BGA rework. Also the endoscope is a necessity for checking the ball collapse, the surface of the BGA ball post reflow, the wetting action as well as other attributes is important in BGA rework.

In addition to the equipment requirements for modern day BGA rework, the skill level, dexterity and process knowledge of the rework technicians working on BGA rework is even more demanding today. The BGA rework technician needs to understand reflow profiles in order to deal with printed circuit boards with a high density of ground planes. The BGA rework technician must also understand flux chemistries and how this impacts the kind of cleaning which can be done underneath the device. The BGA rework technician must also be able to understand how a variety of conformal coatings can be removed from the PCB as well as underneath the BGA. BGA rework technicians must also understand how device which neighbor the BGA to be reworked can or could be impacted by the BGA rework process profile.

As BGA packages have become more widely-accepted the BGA rework process has become more difficult. This has meant that both the equipment used in BGA rework as well as the technicians doing the rework have had to become more sophisticated.

Failure Modes in Wire bonded and Flip Chip Packages

Failure Modes in Wire bonded and Flip Chip Packages


The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame.

The integration of these packages in high volume SMT assembly demands good assembly process controls at the package level and clear understanding of the failure modes to minimize defect escape to subsequent assembly operations. This challenge is enhanced with the transition to lead free reflow as the higher peak reflow temperatures results in more thermal and CTE mismatch between package and PWB.

The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared.

Introduction

Wire bonded and Flip chip interconnects are in demand for consumer electronics due to reduced circuit geometries and increased wiring density. Reliability of these packages in high volume SMT assembly production requires careful selection of assembly materials and processes such as die attach epoxy, overmold /under fill material s and carefully controlled reflow profiles. Tighter storage and handling controls of components and processes are necessary for good yields and reliability due to the narrow process windows for lead free reflow.

The paper summarizes the typical defects and failure modes seen in manufacturing of thin form factor packages, understanding of the root cause, corrective actions and lessons learned in high volume subcontract assembly operations.

Defects and failure mode evaluation

The package manufacturing process has a variety of materials and processes used to make the end product. There can be many sources of defects if materials and processes are not controlled adequately. One key defect prevention tool used in the early engineering stages is DFMEA ( Design Failure Modes and Effects analysis) and PFMEA ( Process Failure Modes and Effects Analysis) to predict the risks in design and process and put controls in place to minimize defects

The migration to thin form factor packages requires more focus on handling controls, moisture sensitivity classifications,[3], material shelf life and tighter process windows.

The flip chip package assembly yields are very dependent on proper bump alignment, reflow and molding process. The laminate substrate material, surface finish, and CTE play a key role in the reliability of the package. Successful assembly of the package requires proper bump alignment and intermetallic formation at package /die interface and bump/substrate interface as shown in Figure 11 and Figure 12. The laminate pad geometry and solder mask windows optimization is critical for proper joint formation. The glass transition temperature of the laminate, and its CTE (Coefficient of thermal expansion) and warpage characteristics can have an impact on bump reliability. Additionally, reflow profiles need to be optimized to provide adequate solder reflow without causing delamination of the substrate.


Proper pad to bump alignment is more critical for a copper stud bump as it does not have the self-centering that a solder bump has. CTE mismatch between substrate and die can have significant impact on copper bump reliability. [4].Figure 13 shows an acceptable joint using copper interconnect and Figure 14 shows a crack in a copper bump interconnect.

X-sectioning is conducted post reflow to understand the solder joint profile, alignment, presence or absence of voids and to evaluate the grain structure of the solder joint. Voids can get trapped at the bump to substrate interface and cause assembly issues. Generally acceptable criteria for voids are less than 30% of the bump diameter.

Switching to a low voiding solder paste can help minimize the void issue. An alternate to bumping with solder paste is a solder ball drop process which has minimal void issues.

X- Sectional analysis also helps evaluate the package molding process to ensure that there is proper coverage of the mold compound around the bumps and minimal voiding. Low pin count packages are typically over molded and survive the package level reliability tests. Higher pin counts packages require under fill apply and cure post reflow. Careful l evaluation of under filled packages is required to ensure that there is no solder extrusion in the under fill during the cure process. Other failure modes that can be seen in X-sectional and SEM/EDX analysis are UBM (under bump metallurgy) separation from solder bump, passivation cracking, bump corrosion, pad separation etc.

The variety of defects discussed earlier in flip chip and wire bonded packages require a thorough follow up with production line records, controls, training and documentation. Typical causes of cosmetic and functional defects are optimized processes, handling damage, ESD controls, operator turnover, training, material controls etc. Some of the defects are not exposed during qualification process and surface later on when machines and processes are fully utilized for prodcution ramp. To minimize this defect escape a detailed package contstruction analysis is condcuted prior to qualification approval. The allows time to isolate defects and drive corrective action and conduct process window optimization before launching production.

For wire bonded packages, die attach , ball bonds, wedge bonds and package molding are evaluated using a X-section. Figure 15 shows the package wire bonds and Figure 16 shows the package mold compound.

Wirebond reliability is critcal for the success of the package in assembly processes and subsequent customer applicatios. Proper intermetallic formation and shear values >25 gms, and minimal voiding are expected post wire bond. Figure17 shows the intermetallic formation in agold to Aluminum wire bond. Figure 18 shows a wedge bond made on the lead. Lifted wedge bonds can be prevented by optimizing the bond parameter recipes and maintaining a clean bond surface.


X-sectional analysi s is also conducted for flip chip package to understand the package an ddie thicness, laminate, vias, bump height, voids , intermetallics etc. Figure 19 shows a X-section of a flip chip package.


The controls on the production floor or at asubcontract operation need tobe reviewed frequently to minimze defect occurrence and escape. When a failure mode is understood and corrected, the FMEAS and control plans should be updated to reflect the changes and the “lessons learned”. Yield targets and yield improvement plan should be defined prior to prodcution launch

As originally published in the IPC APEX EXPO Conference Proceedings.
and reviewed on an ongoing basis. Yield data review using top 3 yield detractors by part number is helpful in DPPM reduction efforts. Manufacturing line audits and training review and refresher are also a means for continuous improvement. Monitoring Cp/Cpk for each critcal process and 10- 15 production lots after launch provides an effective source of issues to focus for continuous proces improvement and optimization.

Conclusion:
Wire bonded and flip chip bu mped interconnects are a reliable form of interconnect if bond parameters, reflow process, mold material sets, substrate pads and solder mask are optimized. Successful assembly and reliability of these packages can be achieved with careful understanding of failure modes, clear ,concise documentation, training and teamwork with subcontract facilities.

WHEN TO USE FLEX CIRCUIT VS RIGID CIRCUIT BOARD

WHEN TO USE FLEX CIRCUIT VS RIGID CIRCUIT BOARD

No Compromise Between Power and Volume
Medical devices and implants.
Inner-engine automobile sensors.
Measurement sensors for the oil and gas industry.

Consumer electronics.
Flexible circuitry may be preferable to rigid circuitry in situations where space or weight is limited.

Size and Weight Reduction Bene  ts to Flexible Circuitry ，

Generally,  fexible circuitry is the go-to solution for manufacturers who need:

Wiring solutions that  t where rigid boards cannot.

Thin, lightweight products that are nonetheless durable.

Miniaturized versions of existing technologies.

Three-dimensional packaging geometry.

A low number of device interconnects.

Shock and vibration resistance.

These benets point to  exible circuitry options as an ideal solution for mobile consumer electronics. Enterprising circuit board amateurs who take apart their smart phones or laptop computers will  nd a wealth of  exible circuitry inside any modern device on the market.
n the case of mobile devices, the use of rigid circuitry would result in a device too large, too heavy, and too fragile to conveniently carry around. This was the case with the Osborne I, the  rst fully powered mobile computer, which weighed in at an intimidating 24.5 pounds.

Size and weight reduction represent only one half of the  exible circuit story, however. They are also ideal for high temperature and high-density applications.

High Temperature and High-Density Applications

In many cases,  ex circuits are made of polyimide or a similar polymer. This material dissipates heat better than most rigid circuit board materials. For this reason,  exible circuits can be placed in inconvenient locations where heat would impact the performance of a rigid circuit board.

Flexible circuit boards can be designed to withstand extreme temperatures – between -200° C and 400° C – which explains why they are so desirable for borehole measurements in the oil and gas industry.

In fact, because of these conditions, and the need for small, unobtrusive devices in most industrial environments,  exible circuits represent the  rst choice for engineering design in most industrial sensor technologies.

High temperature resistance comes usually comes with good chemical resistance and excellent resistance to radiation and UV exposure as well. Combined with the ability to control impedances in high density circuit board designs,  exible circuit designs o er many bene ts to manufacturers.

Why Not Make All Circuit Boards Flexible?

Flexible circuit boards are certainly useful, but they are not going to replace rigid circuit boards for all applications. Cost e ciency is the main obstacle to implementing an exclusively  exible circuit board design in a consumer product. Rigid circuit boards are less expensive to manufacture and install in a typical automated high-volume fabricating facility.

Typically, the ideal solution for an innovative product is one that incorporates  exible circuitry when necessary, and employs solid, reliable rigid circuit boards where possible to keep manufacturing and assembly costs down.

Some manufacturers even use hybrid rigid- ex printed circuit boards expressly for this purpose. This is common in laptop computers and medical devices, where rigid circuit boards can be connected to one other using ribbon-like  exible circuits. These boards can be compounded and designed to meet any number of engineering needs by focusing on the respective strengths of each circuit board base technology.